US 11,056,205 B1
Memory device and write method thereof
Ya-Jui Lee, Taichung (TW); and Kuan-Fu Chen, Taipei (TW)
Filed by MACRONIX International Co., Ltd., Hsinchu (TW)
Filed on Jun. 22, 2020, as Appl. No. 16/908,626.
Int. Cl. G11C 11/34 (2006.01); G11C 16/34 (2006.01); G11C 16/30 (2006.01); G11C 16/26 (2006.01); G11C 16/10 (2006.01)
CPC G11C 16/3481 (2013.01) [G11C 16/10 (2013.01); G11C 16/26 (2013.01); G11C 16/30 (2013.01); G11C 16/3404 (2013.01)] 14 Claims
OG exemplary drawing
1. A memory device, comprising:
a non-volatile memory; and
a control circuit performing a first write operation and a first write verification operation on a plurality of memory cells of the non-volatile memory, wherein after the plurality of memory cells pass the first write verification operation, the control circuit performs a second write verification operation on target memory cells corresponding to at least one target threshold voltage in the plurality of memory cells, when a failure bit count of the target memory cells is not less than a preset number of bits, the control circuit performs a second write operation and a third write verification operation on the plurality of memory cells.