US 11,055,109 B2
Acceleration module supporting controlled configuration of a programmable logic device
Oren Ish-Am, Kiryat Tivon (IL); Guy Heller, Tel Aviv (IL); and Noam Cohen, Kfar Saba (IL)
Filed by Mellanox Technologies, Ltd., Yokneam (IL)
Filed on May 1, 2019, as Appl. No. 16/400,047.
Prior Publication US 2020/0348944 A1, Nov. 5, 2020
Int. Cl. G06F 9/445 (2018.01); G06F 11/26 (2006.01); G06F 13/40 (2006.01); G06F 13/42 (2006.01); G06F 9/4401 (2018.01); G06F 30/34 (2020.01); G06F 15/78 (2006.01)
CPC G06F 9/445 (2013.01) [G06F 11/26 (2013.01); G06F 13/4022 (2013.01); G06F 13/4282 (2013.01); G06F 9/441 (2013.01); G06F 9/4406 (2013.01); G06F 15/7867 (2013.01); G06F 30/34 (2020.01); G06F 2213/0026 (2013.01)] 18 Claims
OG exemplary drawing
10. A method, comprising:
in an electronic device that comprises a Programmable Logic Device (PLD) coupled to a processor and to a Nonvolatile Memory (NVM) that stores a loadable shell image and a loadable user image, wherein the shell image supports at least communication with the processor, and wherein a bus client performs communication with a host in accordance with a bus protocol,
loading the shell image into the PLD upon initialization, and running the loaded shell image;
receiving from the processor, by the shell image, a load indication for selecting between the shell image and the user image; and
when the load indication selects the user image, loading the user image into the PLD and running the loaded user image, wherein a process of loading the shell image and then the user image completes before the host concludes attempting to enumerate the bus client of the user image in accordance with the bus protocol.