US 11,055,026 B2
Updating a register in memory
Isom Crawford, Jr., Royse City, TX (US)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by Micron Technology, Inc., Boise, ID (US)
Filed on Oct. 31, 2019, as Appl. No. 16/670,461.
Application 16/670,461 is a continuation of application No. 15/265,965, filed on Sep. 15, 2016, granted, now 10,466,928.
Prior Publication US 2020/0065030 A1, Feb. 27, 2020
This patent is subject to a terminal disclaimer.
Int. Cl. G06F 3/06 (2006.01)
CPC G06F 3/0659 (2013.01) [G06F 3/0604 (2013.01); G06F 3/0611 (2013.01); G06F 3/0625 (2013.01); G06F 3/0679 (2013.01); G06F 3/0688 (2013.01); Y02D 10/00 (2018.01)] 19 Claims
OG exemplary drawing
 
1. An apparatus, comprising:
an array of memory cells of a processing in memory (PIM) device storing a number of elements; and
a controller of the PIM device and coupled to the array of memory cells and comprising a register storing a reference, wherein the reference indicates an address of a particular bit position of a first one of the number of elements;
the controller configured to:
increment or decrement, by a particular value, the reference to update the reference to indicate the particular bit position of a second one of the number of elements, wherein:
the particular value corresponds to a quantity of bits of the first one of the number of elements, if the first one of the number of elements is stored in the array of memory cells in a first orientation; and
the particular value corresponds to 1, if the first one of the number of elements is stored in the array of memory cells in a second orientation; and
perform a logical operation using data corresponding to the second one of the number of elements and accessed based on the updated reference stored in the register.