US 11,054,859 B2
Display panel and display device
Yangzhao Ma, Wuhan (CN); Ruiyuan Zhou, Wuhan (CN); and Yingjie Chen, Wuhan (CN)
Assigned to WuHan TianMa Micro-electronics CO., LTD, Wuhan (CN)
Filed by WuHan TianMa Micro-electronics CO., LTD, Wuhan (CN)
Filed on Dec. 19, 2019, as Appl. No. 16/721,699.
Claims priority of application No. 201910795541.0 (CN), filed on Aug. 27, 2019.
Prior Publication US 2021/0064087 A1, Mar. 4, 2021
Int. Cl. G06F 1/16 (2006.01); G06F 1/18 (2006.01); H01L 27/32 (2006.01)
CPC G06F 1/1637 (2013.01) [G06F 1/1686 (2013.01); G06F 1/189 (2013.01); H01L 27/326 (2013.01); H01L 27/3234 (2013.01); H01L 27/3276 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A display panel, comprising:
a display region; and
a non-display region;
wherein the display region comprises a plurality of pixel units arranged in an array of rows extending along a row direction and of columns extending along a column direction;
wherein the display region comprises a first display region and a second display region at least partially surrounding the first display region;
wherein a density of the pixel units in the first display region is smaller than a density of the pixel units in the second display region;
wherein the plurality of pixel units comprises a plurality of first pixel unit rows and a plurality of second pixel unit rows that are alternately arranged along the column direction and located in the first display region; each of the plurality of first pixel unit rows comprises a plurality of first pixel units arranged along the row direction, and each of the plurality of second pixel unit rows comprises a plurality of second pixel units arranged along the row direction; along the row direction, at least one of the plurality of first pixel units is located between two adjacent second pixel units of the plurality of second pixel units, and at least one of the plurality of second pixel units is located between two adjacent first pixel units of the plurality of first pixel units;
wherein the first display region further comprises a plurality of first signal lines extending along the row direction and arranged along the column direction, and a plurality of second signal lines extending along the column direction and arranged along the row direction; wherein the plurality of first signal lines and the plurality of second signal lines intersect to define a plurality of first pixel circuits and a plurality of second pixel circuits, each of the plurality of first pixel circuits is electrically connected to one of the plurality of first pixel units, and each of the plurality of second pixel circuits is electrically connected to one of the plurality of second pixel units; and
wherein
at least one of the plurality of first pixel circuits and at least one of the plurality of second pixel circuits are electrically connected to a same first signal line of the plurality of first signal lines and to different second signal lines of the plurality of second signal lines, and at least one of the plurality of first pixel units electrically connected to the at least one of the plurality of first pixel circuits and at least one of the plurality of second pixel units electrically connected to the at least one of the plurality of second pixel circuits are located in adjacent rows of the array; or,
at least one of the plurality of first pixel circuits and at least one of the plurality of second pixel circuits are electrically connected to a same second signal line of the plurality of second signal lines and to different first signal lines of the plurality of first signal lines, and at least one of the plurality of first pixel units electrically connected to the at least one of the plurality of first pixel circuits and at least one of the plurality of second pixel units electrically connected to the at least one of the plurality of second pixel circuits are located in adjacent columns of the array.