US 12,349,608 B2
Memory devices and methods of making the same
Desmond Jia Jun Loy, Singapore (SG); Eng Huat Toh, Singapore (SG); and Shyue Seng Tan, Singapore (SG)
Assigned to GlobalFoundaries Singapore Pte. Ltd., Singapore (SG)
Filed by GLOBALFOUNDRIES Singapore Pte. Ltd., Singapore (SG)
Filed on Aug. 24, 2021, as Appl. No. 17/411,032.
Prior Publication US 2023/0065317 A1, Mar. 2, 2023
Int. Cl. H10N 70/00 (2023.01)
CPC H10N 70/828 (2023.02) [H10N 70/011 (2023.02); H10N 70/823 (2023.02); H10N 70/841 (2023.02)] 19 Claims
OG exemplary drawing
 
1. A memory device comprising:
a first electrode having a side, the side has upper and lower portions;
a spacer element directly on the lower portion of the side of the first electrode;
a resistive layer directly on the upper portion of the side of the first electrode; and
a second electrode laterally adjacent to the side of the first electrode, the second electrode having a top surface, a bottom surface, and a first side, wherein the top surface of the second electrode has a concave profile, and wherein the bottom surface and the first side of the second electrode is directly on the resistive layer.