US 12,349,574 B2
Display panel, manufacturing method thereof, and display device
Yue Liu, Beijing (CN)
Assigned to BOE TECHNOLOGY GROUP CO., LTD., Beijing (CN)
Appl. No. 17/764,185
Filed by BOE TECHNOLOGY GROUP CO., LTD., Beijing (CN)
PCT Filed May 12, 2021, PCT No. PCT/CN2021/093339
§ 371(c)(1), (2) Date Mar. 26, 2022,
PCT Pub. No. WO2021/258886, PCT Pub. Date Dec. 30, 2021.
Claims priority of application No. 202010575778.0 (CN), filed on Jun. 22, 2020.
Prior Publication US 2022/0352299 A1, Nov. 3, 2022
Int. Cl. H10K 59/35 (2023.01); H10K 59/173 (2023.01); H10K 59/80 (2023.01); H10K 71/00 (2023.01)
CPC H10K 59/353 (2023.02) [H10K 59/173 (2023.02); H10K 59/80521 (2023.02); H10K 71/00 (2023.02)] 20 Claims
OG exemplary drawing
 
1. A display panel, comprising: a substrate, and a plurality of pixel units on the substrate; wherein the plurality of pixel units are arranged in an array, and two adjacent columns of the pixel units are spaced apart from each other to form an interval area; each pixel unit comprises a pixel defining layer and sub-pixels, and the sub-pixels are in pixel areas defined by the pixel defining layer; cathodes of all sub-pixels in one column of pixel units are connected as one single piece;
wherein the interval area is further provided therein with a transparent inhibition layer, the pixel defining layer and the transparent inhibition layer are arranged in sequence in a direction away from the substrate, and an orthographic projection of the transparent inhibition layer on the substrate completely covers the interval area; and
the transparent inhibition layer is located in the interval area and in the same layer with the cathodes of the sub-pixels, and the transparent inhibition layer in the interval area between every two adjacent columns of the pixel units separates cathodes of the two adjacent columns of the pixel units from each other.