CPC H10D 86/60 (2025.01) [H10D 86/0231 (2025.01); H10D 86/441 (2025.01); G02F 1/133512 (2013.01); G02F 1/1368 (2013.01)] | 16 Claims |
1. A display panel, comprising:
a first substrate comprising:
a first base substrate;
a first metal layer disposed on the first base substrate and comprising a common electrode;
a first semiconductor layer disposed on the first metal layer;
a second metal layer disposed on the first semiconductor layer and comprising a data line;
a second substrate disposed opposite to and spaced apart from the first substrate and comprising:
a second base substrate; and
a third metal layer disposed on the second base substrate; and
a second semiconductor layer disposed between the first metal layer and the third metal layer and insulated from the first semiconductor layer;
wherein the first semiconductor layer and the second semiconductor layer have a same thickness;
wherein the first substrate further comprises a thin film transistor and a data line, the thin film transistor comprises a gate electrode, a source electrode, and a drain electrode, the gate electrode is included in the first metal layer, and the source electrode, the drain electrode, and the data line are included in the second metal layer.
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