US 12,349,452 B2
Bipolar-CMOS-DMOS semiconductor device having a deep trench isolation structure for high isolation breakdown voltage
Yon Sup Pang, Cheonan-si (KR); and Young Ju Kim, Cheongju-si (KR)
Assigned to SK keyfoundry Inc., Cheongju-si (KR)
Filed by SK keyfoundry Inc., Cheongju-si (KR)
Filed on Oct. 13, 2022, as Appl. No. 17/965,094.
Claims priority of application No. 10-2022-0065094 (KR), filed on May 27, 2022.
Prior Publication US 2023/0387104 A1, Nov. 30, 2023
Int. Cl. H10D 84/40 (2025.01); H01L 21/764 (2006.01)
CPC H10D 84/401 (2025.01) 17 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a semiconductor substrate comprising a buried layer; and
a deep trench isolation a predetermined depth disposed starting from an upper surface of the semiconductor substrate,
wherein the deep trench isolation comprises:
a first point disposed near the upper surface of the semiconductor substrate;
a second point disposed near the buried layer; and
a third point disposed near a bottom face of the deep trench isolation, and
wherein the deep trench isolation has an inclination such that a width of the deep trench isolation increases from the second point to the third point.