US 12,349,449 B2
Method for forming semiconductor device and resulting device
Tong-Min Weng, Hsin-Chu (TW); and Tsung-Han Wu, Hsin-Chu (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed on Feb. 23, 2023, as Appl. No. 18/113,516.
Application 16/673,794 is a division of application No. 15/690,340, filed on Aug. 30, 2017, granted, now 10,504,797.
Application 18/113,516 is a continuation of application No. 16/673,794, filed on Nov. 4, 2019, granted, now 11,610,823.
Prior Publication US 2023/0207395 A1, Jun. 29, 2023
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 29/78 (2006.01); H01L 21/02 (2006.01); H01L 21/28 (2006.01); H01L 21/311 (2006.01); H01L 21/3115 (2006.01); H01L 29/66 (2006.01); H10D 30/01 (2025.01); H10D 30/62 (2025.01); H10D 64/01 (2025.01); H10D 64/66 (2025.01); H10D 84/01 (2025.01); H10D 84/03 (2025.01); H10D 84/85 (2025.01)
CPC H10D 84/038 (2025.01) [H01L 21/02126 (2013.01); H01L 21/02131 (2013.01); H01L 21/0217 (2013.01); H01L 21/022 (2013.01); H01L 21/02321 (2013.01); H01L 21/28123 (2013.01); H01L 21/31155 (2013.01); H10D 30/024 (2025.01); H10D 30/62 (2025.01); H10D 64/017 (2025.01); H10D 64/021 (2025.01); H10D 64/671 (2025.01); H10D 84/0184 (2025.01); H10D 84/0193 (2025.01); H10D 84/853 (2025.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising:
at least one gate structure comprising a gate electrode over a substrate, the gate electrode comprising a conductive material;
a first dielectric layer disposed along one or more side walls of the at least one gate structure, the first dielectric layer comprising a material doped with fluorine based on molecular ion implantation using a precursor comprising hydrogen fluoride (HF) and carbon monoxide (CO),
wherein a doping concentration of fluorine in the first dielectric layer is in a range of from about 1×103 to about 1×106 atoms/cm3,
wherein a dielectric constant of the first dielectric layer is established based on the doping concentration of fluorine, and
wherein the material doped with fluorine comprises fluorine doped silicon oxycarbonitride or fluorine doped silicon oxycarbide; and
a second dielectric layer disposed laterally over and in contact with the first dielectric layer such that the first dielectric layer is disposed between the gate electrode and the second dielectric layer and the second dielectric layer does not contact the gate electrode.
 
11. A semiconductor device, comprising:
a first gate structure comprising a first gate electrode over a substrate, the first gate electrode comprising a conductive material;
a second gate structure comprising a second gate electrode over the substrate, the second gate electrode comprising a second conductive material;
an interlayer dielectric (ILD) layer disposed between the first and second gate electrodes;
a first spacer, disposed between the ILD layer and the first gate electrode, comprising a first dielectric layer that comprises a material doped with fluorine based on molecular ion implantation using a precursor comprising hydrogen fluoride (HF) and carbon monoxide (CO),
wherein a doping concentration of fluorine in the first dielectric layer is in a range of from about 1×103 to about 1×106 atoms/cm3,
wherein a dielectric constant of the first dielectric layer is established based on the doping concentration of fluorine, and
wherein the material doped with fluorine comprises fluorine doped silicon oxycarbonitride or fluorine doped silicon oxycarbide;
a second spacer disposed between the ILD layer and the second gate electrode;
a third spacer disposed between the ILD layer and the first spacer; and
a fourth spacer disposed between the ILD layer and the second spacer,
wherein the ILD layer is disposed laterally over and in contact with the third and fourth spacers, respectively.
 
16. A semiconductor device, comprising:
a gate structure comprising a gate electrode over a substrate, the gate electrode comprising a conductive material;
a first dielectric layer disposed along and in contact with first and second side walls of the gate electrode, the first and second side walls being opposite to each other, the first dielectric layer comprising a material doped with fluorine based on molecular ion implantation using a precursor comprising hydrogen fluoride (HF) and carbon monoxide (CO),
wherein a doping concentration of fluorine in the first dielectric layer following the molecular ion implantation is in a range of from about 1×103 to about 1×106 atoms/cm3,
wherein a dielectric constant of the first dielectric layer is established based on the doping concentration of fluorine, and
wherein the material doped with fluorine comprises fluorine doped silicon oxycarbonitride or fluorine doped silicon oxycarbide;
a source region formed over the substrate adjacent to the first side wall of the gate electrode;
a drain region formed over the substrate adjacent to the second side wall of the gate electrode;
an interlayer dielectric (ILD) layer disposed over the source region and the drain region, wherein the first dielectric layer is disposed between the ILD layer and each of the first and second side walls of the gate electrode; and
a second dielectric layer disposed laterally over and in contact with the first dielectric layer such that the first dielectric layer is disposed between the gate electrode and the second dielectric layer and the second dielectric layer does not contact the gate electrode, and
wherein the ILD layer is disposed laterally over and in contact with the second dielectric layer.