US 12,349,426 B2
Source/drain device and method of forming thereof
Chien-I Kuo, Chiayi County (TW); Wei Hao Lu, Taoyuan (TW); Li-Li Su, ChuBei (TW); and Yee-Chia Yeo, Hsinchu (TW)
Assigned to Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed on Apr. 16, 2024, as Appl. No. 18/636,490.
Application 18/636,490 is a division of application No. 17/458,950, filed on Aug. 27, 2021, granted, now 11,990,511.
Prior Publication US 2024/0266398 A1, Aug. 8, 2024
Int. Cl. H01L 29/94 (2006.01); H01L 29/76 (2006.01); H10D 30/01 (2025.01); H10D 30/62 (2025.01); H10D 62/10 (2025.01); H10D 62/13 (2025.01); H10D 84/01 (2025.01); H10D 84/03 (2025.01)
CPC H10D 62/151 (2025.01) [H10D 30/024 (2025.01); H10D 30/6211 (2025.01); H10D 62/115 (2025.01); H10D 84/013 (2025.01); H10D 84/0151 (2025.01); H10D 84/0158 (2025.01); H10D 84/038 (2025.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising:
a first semiconductor fin and a second semiconductor fin, the first semiconductor fin and the second semiconductor fin extending from a substrate;
an isolation region disposed on the substrate between the first semiconductor fin and the second semiconductor fin; and
a source/drain region over the first semiconductor fin and the second semiconductor fin, the source/drain region comprising:
a first layer, a first portion of the first layer extending from the first semiconductor fin, a second portion of the first layer extending from the second semiconductor fin;
a second layer, a first portion of the second layer extending from the first portion of the first layer, a second portion of the second layer extending from the second portion of the first layer; and
a third layer, the third layer being a single continuous layer extending from the first portion of the second layer to the second portion of the second layer, the third layer having a first height in a range from 30 nm to 38 nm, the first height being measured as the shortest distance from a top surface of the isolation region to a merge point of the third layer, the merge point being a highest point of a bottom surface of the third layer between the first semiconductor fin and the second semiconductor fin.