US 12,349,370 B2
Elementary cell comprising a resistive memory and a device intended to form a selector, cell matrix, associated manufacturing and initialization methods
Anthonin Verdy, Grenoble (FR)
Assigned to COMMISSARIAT À L'ÉNERGIE ATOMIQUE ET AUX ÉNERGIES ALTERNATIVES, Paris (FR)
Appl. No. 17/785,699
Filed by COMMISSARIAT À L'ÉNERGIE ATOMIQUE ET AUX ÉNERGIES ALTERNATIVES, Paris (FR)
PCT Filed Dec. 11, 2020, PCT No. PCT/EP2020/085701
§ 371(c)(1), (2) Date Jun. 15, 2022,
PCT Pub. No. WO2021/122358, PCT Pub. Date Jun. 24, 2021.
Claims priority of application No. 1914466 (FR), filed on Dec. 16, 2019.
Prior Publication US 2023/0047263 A1, Feb. 16, 2023
Int. Cl. H10B 63/00 (2023.01); G11C 13/00 (2006.01); H10N 70/00 (2023.01); H10N 89/00 (2023.01)
CPC H10B 63/24 (2023.02) [G11C 13/003 (2013.01); G11C 13/0069 (2013.01); H10N 70/063 (2023.02); H10N 89/00 (2023.02); G11C 2013/0083 (2013.01); G11C 2213/72 (2013.01); G11C 2213/76 (2013.01)] 11 Claims
OG exemplary drawing
 
1. An elementary cell comprising a device and a non-volatile resistive memory connected in series, the device comprising:
a selector upper electrode,
a selector lower electrode,
a layer made of a first active material forming an active selecting layer,
said device being intended to form a volatile selector switching from a first resistive selector state to a second resistive selector state by applying a threshold voltage between the selector upper electrode and the selector lower electrode and switching back to the first resistive selector state as soon as a current flowing through it or a voltage across the selector upper electrode and the selector lower electrode becomes lower again than a holding current or voltage respectively, the first resistive selector state being more resistive than the second resistive selector state,
said non-volatile resistive memory comprising:
a memory upper electrode,
a memory lower electrode,
a layer made of at least one second active material forming an active memory layer,
said non-volatile resistive memory switching from a first resistive memory state to a second resistive memory state by applying a voltage or a current between the memory upper electrode and the memory lower electrode,
wherein said elementary cell is in a configuration in which, both, said active selecting layer is in a conductive crystalline state and said non-volatile resistive memory is in an initial resistive memory state, the initial resistive memory state being a state of the non-volatile resistive memory prior to first use of the elementary cell and being more resistive than the first resistive memory state and the second resistive memory state.