CPC H10B 41/30 (2023.02) [H10B 41/10 (2023.02)] | 16 Claims |
1. A method for making an active area air gap, comprising the following steps:
step 1, performing word line etching to form a plurality of word line structures on a semiconductor substrate, wherein a plurality of field oxides are formed on the semiconductor substrate, a plurality of active areas are isolated from each other by the field oxides, and each of the word line structures spans each of the field oxides and each of the active areas;
step 2, forming a protective spacer on a side surface of the word line structure in a self-aligned manner, wherein the materials of the protective spacer and the field oxide have different etching rates;
step 3, etching the field oxide by means of isotropic etching, so as to lower the top surfaces of the field oxides within and outside a coverage area of the word line structure and thus form an active area air gap between the active areas, wherein the word line structure spans the active area air gap, during the isotropic etching, an etching rate of the protective spacer is less than an etching rate of the field oxide, and after the isotropic etching is completed, the protective spacer is retained on the side surface of the word line structure to protect the word line structure; and
step 4, removing the protective spacer.
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