US 12,348,221 B2
Circuit and method for controlling charge injection in radio frequency switches
Alexander Dribinsky, Naperville, IL (US); Tae Youn Kim, Irvine, CA (US); Dylan J. Kelly, San Diego, CA (US); and Christopher N. Brindle, Poway, CA (US)
Assigned to pSemi Corporation, San Diego, CA (US)
Filed by pSemi Corporation, San Diego, CA (US)
Filed on Jun. 29, 2023, as Appl. No. 18/344,631.
Application 18/344,631 is a continuation of application No. 17/543,720, filed on Dec. 6, 2021, granted, now 11,695,407.
Application 17/543,720 is a continuation of application No. 16/921,790, filed on Jul. 6, 2020, granted, now 11,196,414, issued on Dec. 7, 2021.
Application 16/921,790 is a continuation of application No. 15/826,453, filed on Nov. 29, 2017, granted, now 10,804,892, issued on Oct. 13, 2020.
Application 15/826,453 is a continuation of application No. 14/987,360, filed on Jan. 4, 2016, granted, now 9,887,695, issued on Feb. 6, 2018.
Application 14/987,360 is a continuation of application No. 14/257,808, filed on Apr. 21, 2014, granted, now 9,397,656, issued on Jul. 19, 2016.
Application 14/257,808 is a continuation of application No. 11/881,816, filed on Jul. 26, 2007, abandoned.
Application 11/881,816 is a continuation in part of application No. 11/520,912, filed on Sep. 14, 2006, granted, now 7,890,891, issued on Feb. 15, 2011.
Application 11/520,912 is a continuation in part of application No. 11/484,370, filed on Jul. 10, 2006, granted, now 7,910,993, issued on Mar. 22, 2011.
Application 11/881,816 is a continuation in part of application No. 11/484,370, filed on Jul. 10, 2006.
Claims priority of provisional application 60/833,562, filed on Jul. 26, 2006.
Claims priority of provisional application 60/718,260, filed on Sep. 15, 2005.
Claims priority of provisional application 60/698,523, filed on Jul. 11, 2005.
Prior Publication US 2024/0007098 A1, Jan. 4, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. H03K 17/16 (2006.01); H03K 17/10 (2006.01); H03K 17/284 (2006.01); H03K 17/687 (2006.01); H03K 17/689 (2006.01); H03K 17/04 (2006.01); H03K 17/06 (2006.01); H03K 17/08 (2006.01)
CPC H03K 17/161 (2013.01) [H03K 17/102 (2013.01); H03K 17/284 (2013.01); H03K 17/6874 (2013.01); H03K 17/689 (2013.01); H03K 17/04 (2013.01); H03K 17/06 (2013.01); H03K 17/08 (2013.01); H03K 2217/0009 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A switch circuit comprising:
a plurality of series-coupled transistors configured to selectively couple a signal from an input of the plurality of series-coupled transistors to an output of the plurality of series-coupled transistors based on a switch control signal applied to each transistor of the plurality of series-coupled transistors, wherein a transistor of the plurality of series-coupled transistors is configured to operate in an off state or an on state based on the switch control signal applied to the transistor, wherein the transistor comprises a gate and an accumulated charge sink (ACS) coupled to the gate, and wherein the ACS is configured to control accumulated charge in the transistor when the transistor is operated in the off state; and
a plurality of charge injection control resistors, wherein each charge injection control resistor of the plurality of charge injection control resistors has at least one end coupled to a node between two transistors of the plurality of series-coupled transistors to control injected charge at the node.