US 12,348,202 B2
Operational amplifier circuit and operational amplifier compensation circuit for amplifying input signal at high slew rate
Jungmoon Kim, Namyangju-si (KR); Taeksu Kwon, Suwon-si (KR); Yunseok Jang, Anyang-si (KR); and Keunhwa Park, Seoul (KR)
Assigned to Samsung Electronics Co., Ltd., (KR)
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on Mar. 10, 2022, as Appl. No. 17/691,428.
Claims priority of application No. 10-2021-0062745 (KR), filed on May 14, 2021; and application No. 10-2021-0095157 (KR), filed on Jul. 20, 2021.
Prior Publication US 2022/0368297 A1, Nov. 17, 2022
Int. Cl. H03F 3/45 (2006.01); H03F 3/30 (2006.01); G09G 3/20 (2006.01)
CPC H03F 3/45179 (2013.01) [G09G 3/20 (2013.01); G09G 2310/0291 (2013.01)] 18 Claims
OG exemplary drawing
 
1. An operational amplifier compensation circuit, comprising:
a first transistor activated/deactivated in response to a level difference between an input signal applied to an operational amplifier and an output signal provided by the operational amplifier;
a first signal amplifying circuit including a second transistor and a first load, wherein the first signal amplifying circuit is configured to generate a first gate voltage based on the level difference between the input signal and the output signal when the first transistor is activated; and
a third transistor configured to generate a first compensation current in response to the amplified first gate voltage, and provide the first compensation current to the operational amplifier,
wherein the first signal amplifying circuit further includes a fourth transistor connected to the second transistor, and
activation of the fourth transistor is based on a voltage level of a first amplification signal provided by the operational amplifier.