| CPC H02H 7/20 (2013.01) [G06F 1/30 (2013.01); H02J 7/0063 (2013.01)] | 20 Claims | 

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               1. A power-fail hold-up circuit, comprising: 
            a first energy storage circuit, comprising a plurality of capacitors connected in parallel, wherein the plurality of capacitors are used to store energy according to a voltage of an input bus of a server and to provide reverse power to the server; the plurality of capacitors comprises a first capacitor and a second capacitor connected in parallel with the first capacitor; the first energy storage circuit further comprises: a third switching transistor and a diode; the first capacitor and the third switching transistor are sequentially connected in series between the positive pole of the input bus and the negative pole of the input bus; a positive pole of the diode is connected to the negative pole of the input bus; and the second capacitor is connected in series between the positive pole of the input bus and a negative pole of the diode; 
                a second energy storage circuit, comprising an inductor and a first switching transistor, wherein the inductor and the first switching transistor are sequentially connected in series between a positive pole of the input bus and a negative pole of the input bus, and the inductor is used to store energy to boost the voltage to a target voltage; and 
                a third energy storage circuit, comprising a second switching transistor and an energy storage capacitor, wherein the second switching transistor and the energy storage capacitor are sequentially connected in series between the inductor and the negative pole of the input bus, the inductor is used to charge the energy storage capacitor, and the energy storage capacitor provides reverse power to the server. 
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