US 12,347,799 B2
Bond pad structure coupled to multiple interconnect conductive\ structures through trench in substrate
Ming Chyi Liu, Hsinchu (TW)
Assigned to Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu (TW)
Filed on Aug. 8, 2023, as Appl. No. 18/366,844.
Application 18/366,844 is a division of application No. 17/366,556, filed on Jul. 2, 2021, granted, now 11,990,433.
Claims priority of provisional application 63/178,064, filed on Apr. 22, 2021.
Prior Publication US 2023/0395540 A1, Dec. 7, 2023
Int. Cl. H01L 23/498 (2006.01); H01L 23/00 (2006.01); H01L 25/065 (2023.01)
CPC H01L 24/05 (2013.01) [H01L 23/49822 (2013.01); H01L 23/49844 (2013.01); H01L 24/03 (2013.01); H01L 25/0657 (2013.01); H01L 2224/03001 (2013.01); H01L 2224/033 (2013.01); H01L 2224/05556 (2013.01); H01L 2224/05573 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method comprising:
forming an interconnect structure comprising a plurality of interconnect conductive structures embedded in an interconnect dielectric layer over a frontside of a substrate, the plurality of interconnect conductive structures having upper surfaces that are level with one another and spaced laterally apart from one another within the interconnect dielectric layer;
flipping the substrate over to pattern a backside of the substrate;
removing portions of the substrate to form a trench in the substrate that extends through the substrate to expose the interconnect structure, wherein the trench exposes the plurality of interconnect conductive structures;
removing portions of the interconnect dielectric layer to expose each of the plurality of interconnect conductive structures; and
forming a bond pad structure that extends from the backside of the substrate to the frontside of the substrate through the trench of the substrate to contact the upper surfaces of each of the plurality of interconnect conductive structures.