US 12,347,783 B2
Interconnect architecture with silicon interposer and EMIB
Md Altaf Hossain, Portland, OR (US); Ankireddy Nalamalpu, Portland, OR (US); Dheeraj Subbareddy, Portland, OR (US); Robert Sankman, Phoenix, AZ (US); Ravindranath V. Mahajan, Chandler, AZ (US); Debendra Mallik, Chandler, AZ (US); Ram S. Viswanath, Phoenix, AZ (US); Sandeep B. Sane, Chandler, AZ (US); Sriram Srinivasan, Chandler, AZ (US); Rajat Agarwal, Portland, OR (US); Aravind Dasu, Milpitas, CA (US); Scott Weber, Piedmont, CA (US); and Ravi Gutala, San Jose, CA (US)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Jan. 5, 2024, as Appl. No. 18/406,018.
Application 18/406,018 is a continuation of application No. 18/079,753, filed on Dec. 12, 2022, granted, now 11,901,299.
Application 18/079,753 is a continuation of application No. 16/235,879, filed on Dec. 28, 2018, granted, now 11,557,541, issued on Jan. 17, 2023.
Prior Publication US 2024/0145395 A1, May 2, 2024
Int. Cl. H01L 23/538 (2006.01); H01L 23/00 (2006.01); H01L 23/48 (2006.01); H01L 25/18 (2023.01)
CPC H01L 23/5385 (2013.01) [H01L 23/5386 (2013.01); H01L 24/16 (2013.01); H01L 24/17 (2013.01); H01L 25/18 (2013.01); H01L 23/481 (2013.01); H01L 2224/16146 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/17181 (2013.01); H01L 2924/381 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An electronic package, comprising:
a package substrate;
an interposer coupled to the package substrate with interconnects;
a first die stack on the interposer;
a second die stack on the interposer, the second die stack laterally spaced apart from the first die stack along a first direction;
a third die stack on the interposer, the third die stack laterally spaced apart from the second die stack along the first direction;
a fourth die stack on the interposer, the fourth die stack laterally spaced apart from the first die stack along a second direction, the second direction orthogonal to the first direction;
a fifth die stack on the interposer, the fifth die stack laterally spaced apart from the third die stack along the second direction, and the fifth die stack laterally spaced apart from the fourth die stack along the first direction; and
a die coupled to the package substrate, the die having a footprint greater than a footprint of the first die stack, greater than a footprint of the second die stack, greater than a footprint of the third die stack, greater than a footprint of the fourth die stack, and greater than a footprint of the fifth die stack.