US 12,347,780 B2
Integrated circuit package with flipped high bandwidth memory device
Krishna Vasanth Valavala, Chandler, AZ (US); Chandra Mohan Jha, Tempe, AZ (US); Andrew Paul Collins, Chandler, AZ (US); and Omkar G. Karhade, Chandler, AZ (US)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Sep. 15, 2021, as Appl. No. 17/475,726.
Prior Publication US 2023/0081139 A1, Mar. 16, 2023
Int. Cl. H01L 23/538 (2006.01); H01L 23/367 (2006.01); H01L 25/00 (2006.01); H01L 25/065 (2023.01); H01L 25/18 (2023.01)
CPC H01L 23/5381 (2013.01) [H01L 23/367 (2013.01); H01L 23/5384 (2013.01); H01L 23/5386 (2013.01); H01L 25/0652 (2013.01); H01L 25/18 (2013.01); H01L 25/50 (2013.01); H01L 2225/06513 (2013.01); H01L 2225/06589 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An integrated circuit (IC) package, comprising:
a first package substrate;
a die stack comprising:
a first die, and
a plurality of second dies stacked between the first die and the first package substrate, wherein an end one of the second dies is attached to a first portion of the first package substrate;
a bridge coupled to the first die with interconnect structures, wherein at least a portion of the die stack is between at least a portion of the bridge and at least a portion of the first package substrate; and
an IC assembly over a second portion of the first package substrate, the IC assembly comprising:
a third die, and
a fourth die coupled to the third die, wherein the third die is between the first package substrate and the fourth die; and
a second package substrate between the first package substrate and the IC assembly, the second package substrate comprising:
a conductive via, and
at least one of: an organic material, a glass material, a material comprising silicon, and a ceramic material.