US 12,347,778 B2
Semiconductor device and electronic system including the same
Kyunghwan Lee, Seoul (KR); Yongseok Kim, Suwon-si (KR); Dongsoo Woo, Seoul (KR); and Junhee Lim, Seoul (KR)
Assigned to Samsung Electronics Co., Ltd., Gyeonggi-do (KR)
Filed by Samsung Electronics Co., Ltd., Suwon-si (KR)
Filed on Apr. 18, 2022, as Appl. No. 17/722,672.
Claims priority of application No. 10-2021-0107335 (KR), filed on Aug. 13, 2021.
Prior Publication US 2023/0049653 A1, Feb. 16, 2023
Int. Cl. H01L 23/535 (2006.01); H01L 23/00 (2006.01); H01L 25/065 (2023.01); H01L 25/18 (2023.01); H10B 41/27 (2023.01); H10B 43/27 (2023.01)
CPC H01L 23/535 (2013.01) [H01L 24/08 (2013.01); H01L 25/0657 (2013.01); H01L 25/18 (2013.01); H10B 41/27 (2023.02); H10B 43/27 (2023.02); H01L 2224/08145 (2013.01); H01L 2924/1431 (2013.01); H01L 2924/14511 (2013.01)] 18 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising:
a substrate including a cell array region and a connection region;
an electrode structure including electrodes stacked on the substrate, each of the electrodes including a line portion on the cell array region and a pad portion on the connection region;
vertical patterns penetrating the electrode structure;
a cell contact on the connection region and connected to the pad portion; and
an insulating pillar below the cell contact, with the pad portion interposed therebetween,
wherein the pad portion comprises,
a first portion having a top surface higher than the line portion, and
a second portion being between the cell contact and the insulating pillar, the second portion including a first protruding portion, the first protruding portion extending from the first portion toward the substrate and covering a top surface of the insulating pillar, and
wherein a thickness of the second portion is larger than a thickness of the first portion.