| CPC H01L 23/5283 (2013.01) [H01L 21/76832 (2013.01); H01L 21/76837 (2013.01); H01L 21/76885 (2013.01)] | 21 Claims |

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1. A method of fabricating a semiconductor device, comprising:
providing a semiconductor substrate having at least one electrical component;
forming a patterned wiring layer above the semiconductor substrate, the patterned wiring layer including a plurality of wiring portions, wherein sidewalls of adjacent wiring portions are separated from each other, the sidewalls making a first angle with a horizontal surface in a region between the adjacent wiring portions;
forming a first insulating passivation layer over the wiring portions in the region between the adjacent wiring portions, the first insulating passivation layer having the horizontal surface, wherein the first insulating passivation layer has a side surface which makes an angle with the horizontal surface of greater than:
the first angle; and
103°; and
forming a second insulating passivation layer on the first insulating passivation layer,
wherein the first insulating passivation layer and the second insulating passivation layer do not have a void in the region between adjacent wiring lines.
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