US 12,347,768 B2
Semiconductor device including via structure
Anthony Dongick Lee, Hwaseong-si (KR); Sangcheol Na, Seoul (KR); Kichul Park, Suwon-si (KR); Doohwan Park, Yongin-si (KR); Kyoungwoo Lee, Hwaseong-si (KR); Rakhwan Kim, Suwon-si (KR); Yoonsuk Kim, Hwaseong-si (KR); Jinnam Kim, Anyang-si (KR); Hoonjoo Na, Seoul (KR); Eunji Jung, Hwaseong-si (KR); and Juyoung Jung, Yongin-si (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on Oct. 6, 2022, as Appl. No. 17/961,056.
Claims priority of application No. 10-2021-0167727 (KR), filed on Nov. 29, 2021.
Prior Publication US 2023/0170296 A1, Jun. 1, 2023
Int. Cl. H01L 23/522 (2006.01); H01L 23/532 (2006.01)
CPC H01L 23/5226 (2013.01) [H01L 23/53223 (2013.01); H01L 23/53238 (2013.01); H01L 23/53266 (2013.01)] 22 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a substrate;
a wiring layer over the substrate;
a first via structure directly contacting a lower portion of the wiring layer, the first via structure comprises a first via metal layer and a first barrier metal layer surrounding the first via metal layer, the first barrier metal layer directly contacting an entirety of a bottom surface of the first via metal layer; and
a second via structure directly contacting an upper portion of the wiring layer, the second via structure comprises a second via metal layer and a second barrier metal layer surrounding the second via metal layer, the second barrier metal layer directly contacting an entirety of a bottom surface of the second via metal layer,
wherein the first via structure generates first stress in the wiring layer,
the second via structure generates second stress in the wiring layer, the second stress is of an opposite type to the first stress, and
the first stress and the second stress compensate for each other in the wiring layer.