| CPC G11C 7/1063 (2013.01) [G11C 7/106 (2013.01); G11C 7/1066 (2013.01); G11C 7/222 (2013.01)] | 17 Claims |
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1. A pipe register comprising:
a plurality of register units configured to output data in response to control signals; and
a pipe control circuit configured to generate a reference timing signal by dividing a clock signal and generate the control signals based on a read enable signal and the reference timing signal,
wherein the clock signal is activated in a first time after an activation time of the read enable signal, and at least one of the control signals has a pre-toggle section before a first pulse of the clock signal.
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