US 12,347,509 B2
Memory system including a sub-controller and operating method of the sub-controller
Jong Joo Lee, Gyeonggi-do (KR)
Assigned to SK hynix Inc., Gyeonggi-do (KR)
Filed by SK hynix Inc., Gyeonggi-do (KR)
Filed on Feb. 12, 2024, as Appl. No. 18/438,732.
Application 18/438,732 is a division of application No. 17/529,970, filed on Nov. 18, 2021, granted, now 11,901,027.
Claims priority of application No. 10-2021-0073738 (KR), filed on Jun. 7, 2021.
Prior Publication US 2024/0212779 A1, Jun. 27, 2024
Int. Cl. G11C 29/42 (2006.01); G11C 8/18 (2006.01); G11C 29/12 (2006.01)
CPC G11C 29/42 (2013.01) [G11C 8/18 (2013.01); G11C 29/1201 (2013.01); G11C 29/12015 (2013.01)] 9 Claims
OG exemplary drawing
 
1. A method for operating a sub-controller, the method comprising:
generating a main data strobe clock used for transferring main data;
generating sub-data strobe clocks by decreasing a frequency of the main data strobe clock;
receiving sub-data in synchronization with the sub-data strobe clocks;
merging the sub-data from different sub-channels to obtain the main data; and
outputting the main data in synchronization.