US 12,347,503 B2
Machine learning assisted read verify in a memory sub-system
Amit Bhardwaj, Hyderabad (IN)
Assigned to Micron Technology, Inc., Boise, ID (US)
Filed by MICRON TECHNOLOGY, INC., Boise, ID (US)
Filed on Nov. 3, 2023, as Appl. No. 18/501,463.
Application 18/501,463 is a continuation of application No. 17/523,523, filed on Nov. 10, 2021, granted, now 11,810,630.
Claims priority of application No. 202141039710 (IN), filed on Sep. 2, 2021.
Prior Publication US 2024/0062841 A1, Feb. 22, 2024
Int. Cl. G11C 16/16 (2006.01); G06F 18/21 (2023.01); G06F 18/243 (2023.01); G06N 20/00 (2019.01); G11C 16/10 (2006.01); G11C 16/26 (2006.01); G11C 16/34 (2006.01); G11C 29/18 (2006.01)
CPC G11C 16/3495 (2013.01) [G06F 18/2178 (2023.01); G06F 18/24323 (2023.01); G06N 20/00 (2019.01); G11C 16/102 (2013.01); G11C 16/16 (2013.01); G11C 16/26 (2013.01); G11C 29/18 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A system comprising:
a memory device; and
a processing device, operatively coupled with the of memory device, to perform operations comprising:
detecting a command to migrate data from a source address to a destination address;
providing, as input to a trained machine learning model, one or more parameters associated with the source address;
receiving, as output from the trained machine learning model, a read verify relevance; and
responsive to determining that the read verify relevance satisfies a condition, performing the command to migrate the data.