| CPC G09G 3/3233 (2013.01) [G09G 2300/0842 (2013.01); G09G 2310/061 (2013.01); G09G 2310/08 (2013.01); G09G 2320/0247 (2013.01)] | 18 Claims |

|
1. A display panel, comprising: a substrate and a plurality of pixels disposed on the substrate, wherein each pixel comprises a pixel circuit and a light-emitting element, wherein the pixel circuit is coupled to the light-emitting element and configured to drive the light-emitting element to emit light, and the pixel circuit comprises: a control circuit coupled respectively to a gate line, a data line, and a control node and configured to control a potential of the control node based on a gate drive signal provided by the gate line and a data signal provided by the data line; a drive circuit with a control terminal coupled to the control node, an input terminal coupled to a drive power line, and an output terminal coupled to the light-emitting element and configured to transmit a drive signal to the light-emitting element based on the potential of the control node and a drive power signal provided by the drive power line to drive the light-emitting element to emit light; a regulating circuit coupled respectively to the drive power line, the control node, and an initial power line and configured, through a coupling effect, to regulate the potential of the control node based on an initial power signal provided by the initial power line and the drive power signal; and wherein the drive circuit comprises a drive transistor, and the regulating circuit comprises at least one regulation capacitor and a storage capacitor, wherein a gate of the drive transistor is coupled to the control node, a first electrode of the drive transistor is coupled to the drive power line, and a second electrode of the drive transistor is coupled to the light-emitting element; the at least one regulation capacitor is connected in series between the drive power line and the control node, and the at least one regulation capacitor is also coupled to the initial power line; and the storage capacitor is connected in series between the drive power line and the control node.
|