| CPC G06F 3/0659 (2013.01) [G06F 3/0658 (2013.01); G06F 3/0604 (2013.01); G06F 3/0679 (2013.01)] | 15 Claims |

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1. A data storage device comprising:
a memory device divided into a plurality of logical units; and
a controller configured to generate a first read command sequence and a second read command sequence for a first logical unit and a second logical unit, respectively, among the plurality of logical units, in response to an external command and configured to continuously output the first and second read command sequences to the memory device,
wherein the controller is configured to generate a first address recovery sequence for recovering a row address included in the first read command sequence and configured to output the first address recovery sequence to the memory device after outputting the second read command sequence.
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