| CPC G06F 17/142 (2013.01) [G06F 7/768 (2013.01); G06F 13/287 (2013.01)] | 16 Claims |
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1. A method comprising:
performing Fast Fourier Transform (FFT) operations to generate FFT output samples that includes a plurality of groups of N FFT output samples for a plurality of digital signals, respectively;
performing, on each group of N FFT output samples, using circular shift circuitry that includes data multiplexers and address multiplexers, writing operations to write respective sets of k FFT output samples of the N FFT output samples to k banks of a first memory device in which, for each set of k FFT output samples, a respective one of the k FFT output samples is written at an indexed ordered position in a respective one of the k banks, the performing of the writing operations for each set of k FFT output samples further including generating, using the address multiplexers, k addresses that are bit-reversed with respect to the k FFT output samples, wherein k is an integer of 2 or greater and N is an integer multiple of k; and
performing reading operations to read the FFT output samples from the first memory device, by reading the FFT output samples in linear address order from the k banks of the first memory device for storing the FFT output samples in a transposed format in a second memory device.
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