US 12,346,279 B2
Semiconductor device and system including the same
Jaeho Cho, Seoul (KR); Sunho Ki, Suwon-si (KR); and Wangseok Lee, Suwon-si (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on Nov. 18, 2022, as Appl. No. 18/056,790.
Claims priority of application No. 10-2021-0170631 (KR), filed on Dec. 2, 2021.
Prior Publication US 2023/0176989 A1, Jun. 8, 2023
Int. Cl. G06F 13/40 (2006.01); G06F 13/42 (2006.01)
CPC G06F 13/4027 (2013.01) [G06F 13/4221 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device comprising:
a plurality of ports configured for exchanging data with each other in an interface; and
an interface controller including a link training and status state machine (LTSSM) and a memory,
wherein the LTSSM is configured to execute link-up by executing a sequence of states that succeeds in setting a plurality of lanes to the plurality of ports,
wherein the memory is configured to store the sequence of states that succeeds as a reference sequence,
wherein the interface controller changes at least one of the PHY parameters when a calibration operation of adjusting the PHY parameters starts until a sequence of the states, executed by the LTSSM to complete the link-up, matches the reference sequence.