| CPC G06F 12/0842 (2013.01) [G06F 12/0802 (2013.01); G06F 9/45558 (2013.01); G06F 2009/45583 (2013.01)] | 20 Claims |

|
1. A semiconductor device in which a plurality of virtual machines managed by a hypervisor operates, comprising:
a plurality of processors which is configured to be capable of executing the plurality of virtual machines; and
a cache memory which includes a plurality of ways and an allocation information storage unit which is configured to store allocation information for setting allocation of the plurality of ways,
wherein each of the plurality of virtual machines is configured to execute a different operating system from each other,
wherein each of the plurality of processors includes a first identification information storage unit,
wherein the hypervisor is configured to:
set the allocation information so as to allocate at least one of the plurality of ways which can be used by each of the plurality of virtual machines; and
when each of the plurality of processors executes any of the plurality of virtual machines, store virtual machine identification information for identifying a virtual machine executed by each of the plurality of processors in the first identification information storage unit of each of the plurality of processors executing the virtual machine,
wherein, when outputting a memory access request, each of the plurality of processors is configured to output the virtual machine identification information stored in the first identification information storage unit of each of the plurality of processors in association with the memory access request, and
wherein, when the memory access request is not a cache hit, the cache memory is configured to select a way to be replaced data based on the virtual machine identification information associated with the memory access request and the allocation information stored in the allocation information storage unit.
|