US 12,346,253 B2
Cache lookup response filtering
Fabrice Jean Verplanken, Sheffield (GB); Rakesh Raman, Sheffield (GB); and Nikita PrakashChandra Bhandari, Austin, TX (US)
Assigned to Arm Limited, Cambridge (GB)
Filed by Arm Limited, Cambridge (GB)
Filed on Sep. 28, 2023, as Appl. No. 18/476,659.
Prior Publication US 2025/0110874 A1, Apr. 3, 2025
Int. Cl. G06F 12/0808 (2016.01); G06F 12/02 (2006.01); G06F 13/18 (2006.01)
CPC G06F 12/0808 (2013.01) [G06F 12/0292 (2013.01); G06F 13/18 (2013.01); G06F 2212/1021 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An apparatus comprising:
cache invalidation circuitry responsive to a cache invalidation command specifying invalidation scope information indicative of at least one invalidation condition, to control a cache to perform an invalidation process to invalidate cache entries satisfying the at least one invalidation condition,
wherein a given cache entry specifies cached information, address tag information indicative of which address corresponds to the cached information of the given cache entry, and, separate from the address tag information, invalidation qualifying information for use in determining whether the given cache entry satisfies the at least one invalidation condition;
cache lookup circuitry configured to issue to the cache a cache lookup request specifying address information, to request that the cache returns a cache lookup response; and
cache lookup response filtering circuitry responsive to a given hit-indicating cache lookup response which provides the cached information and the invalidation qualifying information returned from a corresponding valid cache entry corresponding to the address information specified by a given cache lookup request, to:
determine whether the given hit-indicating cache lookup response conflicts with an in-progress cache invalidation command, based on the invalidation scope information specified by the in-progress cache invalidation command and the invalidation qualifying information returned from the corresponding valid cache entry by the given hit-indicating cache lookup response; and
in response to determining that the given hit-indicating cache lookup response conflicts with the in-progress cache invalidation command, cause the given hit-indicating cache lookup response to be treated as a miss-indicating cache lookup response indicating that the cache does not comprise any valid cache entry corresponding to the address information of the given cache lookup request.