US 12,345,919 B2
Photonics chips with thermal management for a cavity-mounted chip
Zhuojie Wu, Port Chester, NY (US)
Assigned to GlobalFoundries U.S. Inc., Malta, NY (US)
Filed by GlobalFoundries U.S. Inc., Malta, NY (US)
Filed on Feb. 3, 2023, as Appl. No. 18/105,304.
Prior Publication US 2024/0264374 A1, Aug. 8, 2024
Int. Cl. G02B 6/42 (2006.01); G02B 6/122 (2006.01); G02B 6/136 (2006.01); H01L 23/38 (2006.01); H01L 23/48 (2006.01); G02B 6/12 (2006.01)
CPC G02B 6/1228 (2013.01) [G02B 6/136 (2013.01); G02B 6/4201 (2013.01); H01L 23/38 (2013.01); H01L 23/481 (2013.01); G02B 2006/12121 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A structure comprising:
a substrate including a cavity;
a first thermoelectric device inside the cavity, the first thermoelectric device including a first dielectric layer, a second dielectric layer, a plurality of connectors, a first plurality of pillars, and a second plurality of pillars that alternate with the first plurality of pillars in a series circuit, the plurality of connectors coupling the first plurality of pillars to the second plurality of pillars in the series circuit, the first plurality of pillars and the second plurality of pillars disposed between the first dielectric layer and the second dielectric layer, the first plurality of pillars comprising an n-type semiconductor material, and the second plurality of pillars comprising a p-type semiconductor material; and
a chip disposed inside the cavity adjacent to the first thermoelectric device,
wherein the first dielectric layer includes an opening exposing a portion of one of the plurality of connectors.