| CPC G01R 31/31932 (2013.01) [G01R 31/31727 (2013.01); G01R 31/31935 (2013.01)] | 15 Claims |
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1. A determination device comprising:
an estimation circuit configured to:
receive an input signal including input data indicating 0's or 1's in each clock cycle from outside the determination device;
generate estimation data by estimating first input data in n-th cycle (n is an integer of 2 or more) based on second input data in cycles prior to the n-th cycle and based on a predetermined first generator polynomial; and
output the estimation data,
a determination circuit electrically connected to the estimation circuit and configured to;
receive the first input data in the n-th cycle in the input signal from the outside the determination device;
receive the estimation data from the estimation circuit; and
determine whether the received first input data in the n-th cycle and the received estimation data in the n-th cycle match, wherein
the first generator polynomial is an arithmetic expression configured to:
set the estimation data in the n-th cycle to an inverted value of the input data in (n-1)-th cycle when a logical sum of all the input data in a first duration corresponding to a preset number of cycles prior to the (n-1)-th cycle is 0 or a logical product of all the input data in a second duration corresponding to the preset number of cycles prior to the (n-1)-th cycle is 1, and
set the estimation data in the n-th cycle to the same value as the input data in the (n-1)-th cycle when the logical sum is not 0 and the logical product is not 1.
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