| CPC H10N 50/01 (2023.02) [H10N 50/80 (2023.02)] | 14 Claims |
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1. A method for forming a semiconductor structure, comprising:
providing a substrate, wherein the substrate includes a conductive layer therein, and a surface of the substrate exposes a surface of the conductive layer;
forming a groove adjacent to the conductive layer in the substrate, wherein the groove exposes a portion of a sidewall surface of the conductive layer, and forming the groove adjacent to the conductive layer in the substrate includes:
forming a hard mask structure on the substrate and on the conductive layer;
forming a first patterned layer on the hard mask structure, wherein the first patterned layer includes an opening, and the opening exposes a surface of the hard mask structure on the conductive layer and on a portion of the substrate on a sidewall of the conductive layer;
by using the first patterned layer as a mask, etching the hard mask structure and a portion of the substrate to expose the top surface of the conductive layer and the portion of the sidewall surface of the conductive layer, thereby forming the groove; and
after forming the groove, removing the hard mask structure and the first patterned layer; and
forming a lower electrode layer in the groove and on a top surface of the conductive layer.
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