US 12,021,720 B2
Methods and apparatus to generate dynamic latency messages in a computing system
Ajay Gupta, Portland, OR (US); Ravikumar Balakrishnan, Beaverton, OR (US); Shahrnaz Azizi, Cupertino, CA (US); Maruti Gupta Hyde, Portland, OR (US); Ariela Zeira, Encinitas, CA (US); Arjun Anand, Santa Clara, CA (US); and Jacob Winick, Seattle, WA (US)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Jul. 23, 2020, as Appl. No. 16/937,267.
Prior Publication US 2020/0358685 A1, Nov. 12, 2020
Int. Cl. H04L 43/0852 (2022.01); G06F 1/3203 (2019.01); H04L 47/10 (2022.01); H04L 47/50 (2022.01)
CPC H04L 43/0852 (2013.01) [G06F 1/3203 (2013.01); H04L 47/10 (2013.01); H04L 47/50 (2013.01)] 16 Claims
OG exemplary drawing
 
1. An apparatus comprising:
an active status controller to determine that a modem is active based on a number of packets obtained from a network;
a prediction controller to predict that the packets are indicative of a workload type based on a trained model, the prediction controller to extract a number of features corresponding to statistical characteristics of the packets to generate a feature vector, the prediction controller to infer the workload type based on the feature vector; and
a latency value generator to generate a latency value based on the workload type of the packets, the latency value to cause a processor to enter a power saving state or a power executing state.