US 12,021,122 B2
Semiconductor device and manufacturing method thereof
Anbang Zhang, Zhuhai (CN); and King Yuen Wong, Zhuhai (CN)
Assigned to INNOSCIENCE (ZHUHAI) TECHNOLOGY CO., LTD., Zhuhai (CN)
Appl. No. 16/968,875
Filed by INNOSCIENCE (ZHUHAI) TECHNOLOGY CO., LTD., Zhuhai (CN)
PCT Filed Jun. 30, 2020, PCT No. PCT/CN2020/099172
§ 371(c)(1), (2) Date Aug. 11, 2020,
PCT Pub. No. WO2022/000247, PCT Pub. Date Jan. 6, 2022.
Prior Publication US 2022/0376064 A1, Nov. 24, 2022
Int. Cl. H01L 29/40 (2006.01); H01L 23/31 (2006.01); H01L 29/20 (2006.01); H01L 29/205 (2006.01); H01L 29/423 (2006.01); H01L 29/66 (2006.01); H01L 29/778 (2006.01)
CPC H01L 29/408 (2013.01) [H01L 23/3171 (2013.01); H01L 23/3192 (2013.01); H01L 29/2003 (2013.01); H01L 29/205 (2013.01); H01L 29/42316 (2013.01); H01L 29/66462 (2013.01); H01L 29/7786 (2013.01)] 21 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising:
a substrate;
a first nitride semiconductor layer on the substrate;
a second nitride semiconductor layer on the first nitride semiconductor layer and having a band gap greater than a band gap of the first nitride semiconductor layer;
a group III-V dielectric layer disposed on the second nitride semiconductor layer;
a gate electrode disposed on the second nitride semiconductor layer; and
a first passivation layer disposed on the group III-V dielectric layer,
wherein the group III-V dielectric layer is separated from the gate electrode by the first passivation layer, and the gate electrode comprises a protrusion in direct contact with the second nitride semiconductor layer.