CPC H01L 25/0652 (2013.01) [H01L 21/4853 (2013.01); H01L 21/563 (2013.01); H01L 23/3185 (2013.01); H01L 24/16 (2013.01); H01L 25/50 (2013.01); H01L 2224/16225 (2013.01); H01L 2225/06506 (2013.01); H01L 2225/06517 (2013.01); H01L 2225/06562 (2013.01); H01L 2225/06582 (2013.01); H01L 2924/14511 (2013.01); H01L 2924/18161 (2013.01); H01L 2924/19105 (2013.01)] | 18 Claims |
1. A semiconductor device package, comprising:
a substrate;
a first component attached to a first major surface of the substrate;
an underfill positioned under and around the first component;
a second component comprising a NAND die attached to the first major surface and spaced from a first side of the first component by a keep-out-zone area, wherein a side surface of the second component facing the first component provides a border to the underfill;
the keep-out-zone area extending from the first side of first component to the side surface of the second component and free of components or printed circuit board (PCB) traces; and
a third component attached to the first major surface of the substrate and located on the substrate in relation to a second side of the first component,
wherein a portion of the underfill covers the keep-out-zone area and tapers from the first component towards the second component,
wherein the underfill is not positioned between the NAND die and the substrate.
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