| CPC G02F 1/136286 (2013.01) [G02F 1/134363 (2013.01); G02F 1/1368 (2013.01)] | 20 Claims |
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1. An array substrate, comprising a plurality of data lines and a plurality of scan lines, the data lines and the scan lines intersecting to form a plurality of subpixel units, each of the subpixel units comprising a thin-film transistor region and a pixel electrode region located on at least one side of the thin-film transistor region, wherein each of the subpixel units comprises:
a substrate;
a common electrode layer disposed on the substrate; and
an active layer arranged on a side of the common electrode layer and comprising at least one first active layer and a plurality of second active layers, wherein the first active layer is located in a thin-film transistor included in the array substrate;
wherein two of the data lines are respectively disposed on two sides of each subpixel unit, an orthographic projection of the second active layers projected on the substrate overlap with an orthographic projection of the data lines projected on the substrate,
wherein in each of the subpixel units, at least one of the second active layers is disposed at one side of the pixel electrode region away from the thin-film transistor region, nonoverlaps with positions where the common electrode layer and the data lines overlap, and projects onto the substrate an orthographic projection which is outside an orthographic projection of the common electrode layer projected on the substrate.
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