| CPC H10K 59/1315 (2023.02) [H10K 50/80 (2023.02); G09G 3/3225 (2013.01); G09G 2300/0452 (2013.01); G09G 2300/0819 (2013.01); H10K 59/126 (2023.02)] | 18 Claims |
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1. A display panel comprising:
a base layer including a boundary region and a pixel region;
a light-emitting element disposed on the base layer;
a first shielding electrode disposed on the base layer;
a first signal line disposed on the base layer and disposed on the same layer as a layer on which the first shielding electrode is disposed;
a first transistor disposed on the first shielding electrode and including a first input region, a first output region, a first channel region, and a first gate;
an upper electrode disposed on the first gate, overlapping the first gate, and defining a capacitor with the first gate;
a second transistor including a second input region, a second output region, a second channel region, and a second gate;
a plurality of inorganic insulating layers disposed on the base layer and having an opening corresponding to the boundary region;
an organic layer disposed in the opening;
a first connection electrode disposed on the uppermost inorganic insulating layer among the plurality of inorganic insulating layers, connected to the first signal line through a first contact hole passing through the organic layer, and connected to the second output region through a second contact hole passing through corresponding inorganic insulating layers among the plurality of inorganic insulating layers; and
a second signal line disposed on a layer different from a layer on which the first signal line is disposed and electrically connected to the second gate.
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