US 12,342,601 B2
Semiconductor device
Nam Gyu Cho, Seoul (KR); Rak Hwan Kim, Suwon-si (KR); Hyeok-Jun Son, Seoul (KR); Do Sun Lee, Suwon-si (KR); and Won Keun Chung, Seoul (KR)
Assigned to SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed by SAMSUNG ELECTRONICS CO., LTD., Suwon-si (KR)
Filed on Dec. 27, 2023, as Appl. No. 18/397,700.
Application 18/397,700 is a continuation of application No. 17/826,380, filed on May 27, 2022, granted, now 11,881,519.
Application 17/826,380 is a continuation of application No. 17/015,296, filed on Sep. 9, 2020, granted, now 11,349,007, issued on May 31, 2022.
Claims priority of application No. 10-2020-0001796 (KR), filed on Jan. 7, 2020.
Prior Publication US 2024/0128347 A1, Apr. 18, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. H01L 29/49 (2006.01); H01L 21/28 (2025.01); H01L 21/311 (2006.01); H01L 29/06 (2006.01); H01L 29/423 (2006.01); H01L 29/66 (2006.01); H01L 29/786 (2006.01); H10D 30/01 (2025.01); H10D 30/67 (2025.01); H10D 62/10 (2025.01); H10D 64/01 (2025.01); H10D 64/66 (2025.01)
CPC H10D 64/671 (2025.01) [H01L 21/28132 (2013.01); H01L 21/31111 (2013.01); H10D 30/031 (2025.01); H10D 30/6735 (2025.01); H10D 30/6739 (2025.01); H10D 30/6757 (2025.01); H10D 62/121 (2025.01); H10D 64/015 (2025.01); H10D 64/018 (2025.01)] 20 Claims
OG exemplary drawing
 
1. A semiconductor device, comprising:
a fin-type pattern extending in a first direction;
a gate electrode extending in a second direction over the fin-type pattern, the second direction being different from the first direction;
spacers on sidewalls of the gate electrode;
a capping structure on the gate electrode and the spacers, the capping structure including a first capping pattern and a second capping pattern, the second capping pattern being on the first capping pattern;
an interlayer insulating film surrounding sidewalls of each of the spacers and sidewalls of the capping structure, the interlayer insulating film being in contact with the first capping pattern; and
a gate contact on the gate electrode,
wherein the gate contact includes a first sidewall that penetrates at least a portion of the capping structure and a second sidewall that faces the first sidewall and does not penetrate the capping structure.