| CPC H10D 30/6735 (2025.01) [H10D 30/014 (2025.01); H10D 30/031 (2025.01); H10D 30/43 (2025.01); H10D 30/6757 (2025.01); H10D 62/121 (2025.01); H10D 62/151 (2025.01); H10D 64/017 (2025.01); H10D 64/018 (2025.01)] | 20 Claims |
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1. A semiconductor device comprising:
a substrate comprising an active region extending in a first direction;
an element isolation layer, adjacent to the active region, in the substrate;
a gate electrode on the substrate and extending in a second direction which crosses the first direction;
a plurality of channel layers on the active region, spaced apart from each other along a third direction perpendicular to an upper surface of the substrate, and surrounded by the gate electrode; and
a source/drain region provided in a recess of the active region adjacent to the gate electrode, and connected to the plurality of channel layers,
wherein, in the first direction, the gate electrode has a first length on the active region and a second length, greater than the first length, on the element isolation layer.
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