US 12,341,870 B2
Encryption interface
Eugene M. Kishinevsky, Hillsboro, OR (US); Uday Savagaonkar, Portland, OR (US); Alpa T. Narendra Trivedi, Hillsboro, OR (US); Siddhartha Chhabra, Hillsboro, OR (US); Baiju V. Patel, Portland, OR (US); Men Long, Beaverton, OR (US); Kirk S. Yap, Westborough, MA (US); and David M. Durham, Beaverton, OR (US)
Assigned to Intel Corporation, Santa Clara, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Mar. 28, 2022, as Appl. No. 17/706,288.
Application 15/457,004 is a division of application No. 14/581,946, filed on Dec. 23, 2014, granted, now 9,614,666, issued on Apr. 4, 2017.
Application 17/706,288 is a continuation of application No. 16/733,685, filed on Jan. 3, 2020, granted, now 11,316,661.
Application 16/733,685 is a continuation of application No. 15/457,004, filed on Mar. 13, 2017, granted, now 10,530,568, issued on Jan. 7, 2020.
Prior Publication US 2022/0224510 A1, Jul. 14, 2022
Int. Cl. G06F 21/60 (2013.01); G06F 12/14 (2006.01); G06F 21/78 (2013.01); G06F 21/85 (2013.01); G09C 1/00 (2006.01); H04L 9/06 (2006.01); H04L 13/08 (2006.01); H04L 49/356 (2022.01)
CPC H04L 9/0631 (2013.01) [G06F 12/1408 (2013.01); G06F 12/1425 (2013.01); G06F 21/602 (2013.01); G06F 21/85 (2013.01); G09C 1/00 (2013.01); G06F 2212/1052 (2013.01); G06F 2212/402 (2013.01); H04L 2209/125 (2013.01); Y02D 10/00 (2018.01)] 25 Claims
OG exemplary drawing
 
1. A system comprising:
processing circuitry;
a memory controller;
a memory device; and
a hardware encryption interface configured to couple the processing circuitry and the memory device, the hardware encryption interface being transparent to the processing circuitry at least in part by sending messages to the processing circuitry in a same format as messages sent directly from the memory device and emulating the memory controller such that the encryption is transparent to the processing circuitry, and wherein the hardware encryption interface is to:
receive a plaintext request from the processing circuitry;
encrypt data within the plaintext request to obtain a request including the encrypted data; and
communicate the request including the encrypted data to the memory device, wherein the hardware encryption interface is transparent to the memory device at least in part by structuring the request including the encrypted data to be a same structure as messages sent directly from the processing circuitry to the memory device.