US 12,341,569 B1
Wireline link with crosstalk reduction based on controlled channel delay
Ali Khoshniat, San Jose, CA (US); and Ramin Farjadrad, Los Altos, CA (US)
Assigned to Rambus Inc., San Jose, CA (US)
Filed by Eliyan Corporation, Santa Clara, CA (US)
Filed on Dec. 28, 2023, as Appl. No. 18/399,067.
Claims priority of provisional application 63/436,761, filed on Jan. 3, 2023.
Int. Cl. H04B 3/32 (2006.01)
CPC H04B 3/32 (2013.01) 19 Claims
OG exemplary drawing
 
1. A wireline signaling link, comprising:
a first transceiver circuit disposed on a first integrated circuit (IC) chip, the first transceiver circuit comprising
first transmit circuitry to transmit a first set of symbols representing first data, each symbol comprising a symbol time;
first receiver circuitry to receive a second set of symbols representing second data;
a second transceiver circuit disposed on a second IC chip;
a bidirectional channel comprising a first end coupled to the first transceiver circuit and a second end coupled to the second transceiver circuit; and
circuitry to make an adjustment of an electrical delay of the wireline signaling link, the adjustment based on a phase relationship between interference associated with the first data that is received by the first receiver circuitry and the second data that is received by the first receiver circuitry.