US 12,341,511 B2
Power management using voltage islands on programmable logic devices
Mahesh K. Kumashikar, Bangalore (IN); Ankireddy Nalamalpu, Portland, OR (US); Md Altaf Hossain, Portland, OR (US); Dheeraj Subbareddy, Portland, OR (US); Atul Maheshwari, Portland, OR (US); Yuet Li, Fremont, CA (US); and Mahesh A. Iyer, Fremont, CA (US)
Assigned to Altera Corporation, San Jose, CA (US)
Filed by Intel Corporation, Santa Clara, CA (US)
Filed on Dec. 22, 2021, as Appl. No. 17/559,287.
Prior Publication US 2022/0116041 A1, Apr. 14, 2022
Int. Cl. H03K 19/177 (2020.01); H03K 19/17784 (2020.01)
CPC H03K 19/177 (2013.01) 20 Claims
OG exemplary drawing
 
1. A programmable logic device, comprising:
a plurality of programmable logic sectors, wherein each programmable logic sector comprises at least one programmable logic element;
a redundancy logic circuit coupled to the programmable logic sectors for providing a first voltage to a first portion of the programmable logic sectors of the plurality of programmable logic sectors and a second voltage to a second portion of the programmable logic sectors of the plurality of programmable logic sectors, wherein the redundancy logic circuit comprises:
a first level shifter that receives a supply voltage and steps-down the supply voltage to the first voltage; and
multiplexer circuitry that comprises a first multiplexer that remaps logic of a first programmable logic element of the at least one programmable logic element associated with the first portion of the programmable logic sectors to utilize a redundant programmable logic element using the first voltage.