US 12,341,484 B2
Filter circuit, filter, method of manufacturing filter, and electronic device
Yulin Feng, Beijing (CN); Yue Li, Beijing (CN); Yuelei Xiao, Beijing (CN); Huiying Li, Beijing (CN); Xue Cao, Beijing (CN); Kidong Han, Beijing (CN); Yanfei Ren, Beijing (CN); Yifan Wu, Beijing (CN); Wenbo Chang, Beijing (CN); Qichang An, Beijing (CN); and Biqi Li, Beijing (CN)
Assigned to Beijing BOE Optoelectronics Technology Co., Ltd., Beijing (CN); and BOE TECHNOLOGY GROUP CO., LTD., Beijing (CN)
Appl. No. 18/272,790
Filed by Beijing BOE Optoelectronics Technology Co., Ltd., Beijing (CN); and BOE TECHNOLOGY GROUP CO., LTD., Beijing (CN)
PCT Filed Jul. 26, 2022, PCT No. PCT/CN2022/107817
§ 371(c)(1), (2) Date Jul. 17, 2023,
PCT Pub. No. WO2024/020768, PCT Pub. Date Feb. 1, 2024.
Prior Publication US 2024/0388271 A1, Nov. 21, 2024
Int. Cl. H03H 7/38 (2006.01); H03H 7/01 (2006.01); H03H 7/40 (2006.01)
CPC H03H 7/0115 (2013.01) [H03H 7/38 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A filter circuit, comprising a first resonant sub-circuit, a second resonant sub-circuit and an impedance matching network; wherein each of the first resonant sub-circuit and the second resonant sub-circuit is connected to the impedance matching network in series;
the first resonant sub-circuit is configured to allow a signal with a frequency higher than a first frequency to pass; the second resonant sub-circuit is configured to allow a signal with a frequency lower than a second frequency to pass, and the second frequency is greater than the first frequency; the impedance matching network is configured to allow a signal between the first frequency and the second frequency to pass; the impedance matching network comprises a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor and a first inductor; and
a first terminal of the first capacitor is connected to a first terminal of the fourth capacitor, and a second terminal of the first capacitor is connected to a first terminal of the first inductor and a first terminal of the second capacitor; a second terminal of the second capacitor is connected to a first terminal of the third capacitor and a second terminal of the fifth capacitor; and a second terminal of the fourth capacitor is connected to a first terminal of the fifth capacitor, a second terminal of the first inductor and a reference signal terminal.