| CPC H01L 24/25 (2013.01) [H01L 23/295 (2013.01); H01L 23/3171 (2013.01); H01L 23/3185 (2013.01); H01L 23/5329 (2013.01); H01L 24/13 (2013.01); H01L 24/49 (2013.01); H01L 25/0657 (2013.01); H01L 2224/13023 (2013.01); H01L 2224/2541 (2013.01); H01L 2224/49105 (2013.01)] | 20 Claims |
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1. A semiconductor package, comprising:
a lower redistribution structure including a lower insulating layer and a lower redistribution layer disposed on the lower insulating layer;
a semiconductor chip disposed on the lower redistribution structure, and including a connection pad electrically connected to the lower redistribution layer;
connection conductors disposed around the semiconductor chip on the lower redistribution structure, and electrically connected to the lower redistribution layer;
an encapsulant disposed on at least a portion of the semiconductor chip and the connection conductors; and
an upper redistribution structure including an upper insulating layer and upper redistribution layers, wherein the upper insulating layer is disposed on the encapsulant, wherein the upper redistribution layers are disposed on the upper insulating layer and are electrically connected to the connection conductors,
wherein an upper surface of each of the connection conductors and an upper surface of the encapsulant form a first step in a first direction, perpendicular to an upper surface of the lower redistribution structure,
wherein the upper redistribution layers include a first upper redistribution layer and a second upper redistribution layer, wherein the first upper redistribution layer does not overlap the connection conductors, wherein the second upper redistribution layer overlaps the connection conductors, in the first direction, wherein a lower surface of the first upper redistribution layer and a lower surface of the second upper redistribution layer form a second step, and wherein a height of the second step is equal to or smaller than a height of the first step in the first direction.
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