| CPC H01L 23/481 (2013.01) [H01L 21/76898 (2013.01); H01L 23/49811 (2013.01); H01L 24/05 (2013.01); H01L 24/13 (2013.01); H01L 25/0657 (2013.01); H01L 2224/05548 (2013.01); H01L 2224/13008 (2013.01); H01L 2225/06513 (2013.01); H01L 2225/06544 (2013.01)] | 17 Claims |

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1. An integrated circuit device comprising:
a semiconductor substrate having a first surface and a second surface opposite to the first surface;
a first insulating layer on the first surface of the semiconductor substrate;
an electrode landing pad on the first surface of the semiconductor substrate, the electrode landing pad having a sidewall surrounded by the first insulating layer, a top surface spaced apart from the first surface of the semiconductor substrate, and a bottom surface opposite to the top surface;
a conductive pad contacting the bottom surface of the electrode landing pad;
a through-electrode penetrating through the semiconductor substrate and contacting the top surface of the electrode landing pad; and
a pad insulating layer having a bottom surface in contact with the electrode landing pad and a top surface in contact with the first surface of the semiconductor substrate,
wherein a horizontal width of the top surface of the electrode landing pad is less than a horizontal width of the bottom surface of the electrode landing pad and greater than a horizontal width of a bottom surface of the through-electrode in contact with the top surface of the electrode landing pad,
wherein a horizontal width of the conductive pad is greater than the horizontal width of the bottom surface of the electrode landing pad,
wherein a vertical height of the conductive pad is smaller than a vertical height of the electrode landing pad, and
wherein a bottom surface of the electrode landing pad is coplanar with a bottom surface of the first insulating layer.
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