| CPC H01L 21/76251 (2013.01) [H01L 21/6708 (2013.01); H01L 21/76814 (2013.01)] | 20 Claims |

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1. A method of fabricating a semiconductor structure, comprising the steps of:
providing a device wafer having a front surface and a back surface, the device wafer comprising a first dielectric layer, a semiconductor material layer, and a second dielectric layer at least on the front surface;
bonding the front surface of the device wafer to a carrier wafer thereby forming a gap between a peripheral portion of the bonded wafers;
filling the gap with a protection material by a jet nozzle; and
thinning the device wafer until the first dielectric layer is exposed;
wherein the thinning step comprises grinding the back surface of the device wafer, and etching the back surface of the device wafer by using a chemical etching instrument,
wherein a scanning speed of a spray nozzle of the chemical etching instrument is higher at a central portion of the device wafer than at a peripheral portion of the device wafer,
wherein the scanning speed of the spray nozzle is constant at the central portion of the device wafer, and the scanning speed of the spray nozzle decreases from the central portion to the peripheral portion of the device wafer,
wherein the thinning step comprises grinding the back surface of the device wafer to a first predetermined thickness, etching the back surface of the device wafer by using a first etching aqueous solution to a second predetermined thickness, and etching the back surface of the device wafer by using a second etching aqueous solution so that the device wafer is completed removed,
wherein a flow rate of the first etching aqueous solution ranges from about 3 L/min to about 5 L/min, and
wherein the scanning speed of the spray nozzle at a central portion of the device wafer is about 70 mm/s.
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