US 12,341,013 B2
Method and structure for barrier-less plug
Sung-Li Wang, Hsinchu County (TW); Hung-Yi Huang, Hsin-chu (TW); Yu-Yun Peng, Hsinchu (TW); Mrunal A. Khaderbad, Hsinchu (TW); Chia-Hung Chu, Taipei (TW); Shuen-Shin Liang, Hsinchu County (TW); and Keng-Chu Lin, Ping-Tung (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD., Hsinchu (TW)
Filed by Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu (TW)
Filed on Jun. 27, 2024, as Appl. No. 18/756,008.
Application 18/756,008 is a division of application No. 17/509,314, filed on Oct. 25, 2021, granted, now 12,051,592.
Application 17/509,314 is a division of application No. 16/589,941, filed on Oct. 1, 2019, granted, now 11,158,539, issued on Oct. 26, 2021.
Prior Publication US 2024/0347342 A1, Oct. 17, 2024
Int. Cl. H01L 21/768 (2006.01); H01L 21/265 (2006.01); H01L 23/532 (2006.01); H01L 23/535 (2006.01); H10D 64/23 (2025.01)
CPC H01L 21/26586 (2013.01) [H01L 21/76804 (2013.01); H01L 21/76805 (2013.01); H01L 21/7684 (2013.01); H01L 21/76862 (2013.01); H01L 21/76864 (2013.01); H01L 21/76877 (2013.01); H01L 21/76883 (2013.01); H01L 21/76895 (2013.01); H01L 23/53209 (2013.01); H01L 23/53242 (2013.01); H01L 23/53257 (2013.01); H01L 23/535 (2013.01); H10D 64/256 (2025.01); H01L 2221/1068 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A method, comprising:
receiving a structure having a dielectric layer over a conductive feature, wherein the conductive feature includes a first metal;
etching a hole through the dielectric layer and exposing the conductive feature;
depositing a second metal into the hole and in direct contact with the dielectric layer and the conductive feature, the second metal entirely filling the hole;
annealing the structure such that atoms of the first metal diffuse into grain boundaries of the second metal and into interfaces between the second metal and the dielectric layer; and
after the annealing, performing a chemical mechanical planarization (CMP) process to remove at least a portion of the second metal.