US 12,340,987 B2
Tunable plasma exclusion zone in semiconductor fabrication
Che Wei Yang, New Taipei (TW); Chih Cheng Shih, Kaohsiung (TW); Sheng-Chan Li, Tainan (TW); Cheng-Yuan Tsai, Chu-Pei (TW); and Sheng-Chau Chen, Tainan (TW)
Assigned to TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED, Hsin-Chu (TW)
Filed by TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LIMITED, Hsin-Chu (TW)
Filed on May 12, 2022, as Appl. No. 17/742,637.
Prior Publication US 2023/0369023 A1, Nov. 16, 2023
Int. Cl. H01J 37/32 (2006.01); C23C 16/458 (2006.01); C23C 16/505 (2006.01); H01L 21/311 (2006.01)
CPC H01J 37/32577 (2013.01) [C23C 16/4585 (2013.01); C23C 16/505 (2013.01); H01J 37/32082 (2013.01); H01J 37/32541 (2013.01); H01J 37/32568 (2013.01); H01J 37/32642 (2013.01); H01J 37/32697 (2013.01); H01L 21/311 (2013.01); H01J 2237/036 (2013.01); H01J 2237/332 (2013.01); H01J 2237/334 (2013.01)] 20 Claims
OG exemplary drawing
 
1. A plasma exclusion zone ring, comprising:
a dielectric ring configured to be removably affixed in a chamber of a plasma processing apparatus at a distance from an edge region of a semiconductor wafer in the chamber, the dielectric ring configured to interact with an electric field that directs a plasma within the chamber toward the edge region; and
an electrode ring fastened to the dielectric ring and having an inner electrode ring diameter less than an outer dielectric ring diameter of the dielectric ring, the electrode ring configured to face the edge region of the semiconductor wafer in the chamber of the plasma processing apparatus and being electrically couplable to a voltage potential to interact with the electric field, wherein the inner electrode ring diameter is less than a semiconductor wafer diameter of the semiconductor wafer, and the electrode ring is electrically couplable to the voltage potential to tune the plasma toward a center of the semiconductor wafer.
 
8. A plasma processing apparatus, comprising:
a stage to support a semiconductor wafer within a chamber between a first plasma electrode and a second plasma electrode, the chamber configured to receive a process gas that reacts with an electric field generated between the first plasma electrode and the second plasma electrode to create a plasma;
a voltage potential unit to supply a voltage potential; and
a plasma exclusion zone (PEZ) ring configured to be removably affixed in the chamber a distance from an edge region of the semiconductor wafer, the PEZ ring comprising:
a dielectric ring configured to interact with the electric field and direct the plasma with respect to the edge region of the semiconductor wafer, wherein the first plasma electrode surrounds three sides of the dielectric ring such that a sidewall of the dielectric ring at an outer circumference of the dielectric ring faces a sidewall of the first plasma electrode; and
an electrode ring, fastened to the dielectric ring, electrically couplable to the voltage potential unit to receive the voltage potential and direct the plasma with respect to the edge region of the semiconductor wafer.
 
12. A plasma processing apparatus, comprising:
a first plasma electrode;
a second plasma electrode;
a radio frequency power source configured to provide an electric field between the first plasma electrode and the second plasma electrode to generate a plasma; and
a first plasma exclusion zone (PEZ) ring configured to interact with the electric field to cause the plasma to be at least partially excluded from an edge region of a semiconductor wafer when the semiconductor wafer is disposed between the first plasma electrode and the second plasma electrode, wherein the first PEZ ring comprises:
a first electrode ring having a first cross-sectional profile; and
a second electrode ring spaced apart from the first electrode ring by a portion of a dielectric ring, wherein:
the second electrode ring has a second cross-sectional profile, and
the second cross-sectional profile is different than the first cross-sectional profile.