US 12,340,847 B2
Flash memory chip that modulates its program step voltage as a function of chip temperature
Arash Hazeghi, San Jose, CA (US); Pranav Kalavade, San Jose, CA (US); Rohit S. Shenoy, Fremont, CA (US); and Hsiao-Yu Chang, Sunnyvale, CA (US)
Assigned to SK Hynix NAND Product Solutions Corp., Rancho Cordova, CA (US)
Filed by Intel NDTM US LLC, Santa Clara, CA (US)
Filed on Jan. 2, 2024, as Appl. No. 18/402,572.
Application 18/402,572 is a continuation of application No. 16/828,843, filed on Mar. 24, 2020, granted, now 11,923,010.
Prior Publication US 2024/0135995 A1, Apr. 25, 2024
This patent is subject to a terminal disclaimer.
Int. Cl. G11C 16/10 (2006.01); G06F 3/06 (2006.01)
CPC G11C 16/10 (2013.01) [G06F 3/0604 (2013.01); G06F 3/0659 (2013.01); G06F 3/0679 (2013.01)] 20 Claims
OG exemplary drawing
 
1. An apparatus, comprising:
a flash memory chip comprising:
a chip interface to receive commands;
a first array of stacked storage cells;
a temperature sensing device; and,
a controller coupled to the chip interface, the first array of stacked storage cells and the temperature sensing device, wherein the controller is to modulate a program step size voltage applied to the first array of stacked storage cells based on a temperature of the flash memory chip as measured by the temperature sensing device, wherein the controller is to decrease the program step size voltage as the temperature of the flash memory chip moves away from a midpoint temperature of a rated temperature range of the flash memory chip and toward a maximum temperature of the rated temperature range of the flash memory chip and is to decrease the program step size voltage as the temperature of the flash memory chip moves away from the midpoint temperature of the rated temperature range of the flash memory chip and toward a minimum temperature of the rated temperature range of the flash memory chip, wherein, a singular temperature from the midpoint temperature of the rated temperature range of the flash memory chip to the minimum temperature of the rated temperature range of the flash memory chip is able to be assigned its own unique respective program step size voltage.